A FIFO is a specialized dual port memory with an input and an output that operate asynchronously. That is, data can be input at one end of the FIFO at one pace and read from the other end at a different pace. A FIFO is often used when data is received in blocks at one data rate and processed at a steadier, slower rate. One such application is a disk drive interface.
The shift register in a FIFO and its supporting control circuitry may all experience failures, separately or in combination. When a failure or an intentional abort occurs, the FIFO may be left in an unknown state, that is, having an uncertain condition of the data being read, data in the transmit register, and data being sent to a host. This may result in duplication of data when data thought to have been lost is incorrectly re-sent. Such errors may also result in gaps when data thought to have been sent was actually lost.